If you happened to stumble on this page by accident, a little explanation is in order. This page is a continuation of my first uTracer weblog page which discussed the development of a post-card size curve tracer: the uTracer. That page started of with a concept (the uTracer V1) which was abandoned halfway during the project. The second concept, as you can guess the uTracer V2, was completed to the end, and turned out to be quite a descent instrument. Since it had became rather difficult to find all the relevant information on the project in the weblog page, the project was summarized on a separate page which can be found here.
Although the version 2 uTracer works quite well, there is always room for improvement. I learned a lot from the V2 and identified a number of “weak points” which were summarized at the end of the blog . In the mean time I have a lot of new ideas to resolve the issues identified. This page therefore continues where the first page stopped, and will hopefully lead to the uTracer V3.
| to top of page | back to homepage | to part I |
Most of the issues in the version 2 design are related to the way how the anode and screen currents are measured. Figure 2.1A summarizes the current measurement principle used or the version 2 design. The current is measured as a voltage drop over a series resistor in between the reservoir capacitor and the anode of the grid. By using a 1 uF high voltage “dropper” capacitor the pulse shaped drop over the series resistor is level shifted to ground for amplification and AD conversion.
Figure 2.1 The old and the new current sense principles compared.
This construction has two enormous drawbacks. The first drawback is, that apart from the current pulse itself, in this way also the discharging of the reservoir capacitor is measured. Although, as explained in one of the previous sections, it is possible to compensate for this with an additional measurement, it is far from ideal and likely to introduce errors (more info). The second drawback is when the anode (or screen) voltage is increased or decreased; this will also induce a current in the dropper capacitor. It will take some time for the current through the dropper capacitor to return to zero and before the voltage over it becomes constant. So after the boost converter has charged the reservoir capacitor to the desired set point, the boost converter changes to “maintain voltage” mode for a few hundred milliseconds. What I had completely overlooked was that the boost converter pulses in the “maintain voltage” mode can result in significant fluctuations of the reservoir capacitor voltage, especially so for relatively low voltages (more info). This translates back to noise in the current values at low voltages. The solution was to switch the boost converter completely off during the stabilization interval. However, in that case the reservoir capacitor will start to discharge which, although it goes only very slowly, introduces drift. Now of course it is possible to compensate for this, but things become nastier every time. So it became time for a complete revision of the whole measurement principle!
The idea for improved measurement principle discussed in this section was induced by an email from René Schmitz from Germany. The idea is very simple and elegant. It is based on the notion that during the measurement the boost converter is switched off. So the only current flowing through the reservoir capacitor during the measurement pulse is the current through the tube. In that case the current sense resistor can be placed in the ground lead of the reservoir capacitor (Fig. 2.1B). This has the enormous advantage that the voltage over the resistor can now be measured directly with respect to ground without the need for the troublesome dropper capacitor. Additionally in this way only the current is measured and not the discharging of the dropper capacitor! Since the voltage is directly measured with respect to ground it is much easier to amplify the voltage drop over the resistor so that a smaller resistor value can be used. A very attractive idea is to replace this OpAmp with a Programmable Gain Amplifier such as the PGA103 from Burr-Brown of the MAX9939 from MAXIM.
Figure 2.2 By raising the cathode potential to the power supply voltage, the anode to cathode voltage can be varied starting from zero.
Another drawback of the V2 uTracer was that the lowest voltage that the anode and screen boost converters could generate was equal to the supply voltage, so in this case 19.5 V. This means that the output curves (Ia(Va)) can only be taken starting from 19.5 V. At first I didn’t think that this was such a big deal, but looking at the curves, I cannot help thinking that an important part of them is missing. Since the output of a boost converter is directly connected via an inductor and a diode to the input, it is pretty fundamental that the minimum output voltage is equal to the supply voltage (Fig. 2.1A). A simple but nevertheless elegant solution to this problem is to raise the cathode potential by the same amount as the supply voltage. In this way the anode-cathode voltage can be varied from zero to the maximum booster output voltage minus the supply voltage. The simplest way to raise the cathode to the supply voltage is to connect it to the supply voltage (Fig. 2.2A). There is just one small complication: during the measurement pulse the tube conducts a current which, without special precaution, would flow into the power supply, something that most power supplies don’t like. The solution is again rather simple. During the measurement pulse the large buffer capacitor Cb takes up the charge supplied by the tube resulting in a small voltage increase. Since the value of Cb is large, the voltage increase can be kept very small. For example, a current pulse of 200 mA during 1 ms into a capacitor of 1000 uF results in a voltage increase of only (0.2*0.001)/0.001 = 0.2 V. The inductor in series with the supply voltage input keeps the supply current constant during the measurement pulse. The red line in Fig. 2.2B indicates the current flow during the measurement pulse.
Regulation of the Output Voltage
Lets for the moment recall how a boost converter works: when the MOSFET switch closes the current through the inductor will start to increase linearly with time. At a certain point, before the current in the inductor reaches the saturation value, the MOSFET switch opens. The inductor will try to keep the current constant and the only way to do this is to increase the voltage over its terminals to such a value that the diode will start to conduct, and the charge will be dumped into the capacitor, resulting in an increase of the voltage of the capacitor.
So every pulse of the boost converter will result in a step-wise increase of the output voltage. The question now is: how big is this output voltage increment because this will determine the resolution by which we can set the output voltage. The easiest way to answer this question is by using the law of energy conservation: after every pulse the energy which is stored in the inductor will be added to the energy already present in the capacitor (more info).
Figure 2.3 Using energy conservation laws it is possible to calculate the incremental output voltage increase per (set of) output pulse(s).
The equations in the Fig. 2.3 rephrase the energy conservation law in mathematical form. In these equations V1 represents the capacitor voltage before the pulse, V2 the capacitor voltage after the pulse, and I the maximum current in the inductor during the pulse. From this the voltage increment can be solved. The voltage increment is obviously in the first place a function of the maximum inductor current at the end of each pulse. This current is as we know directly proportional to the supply voltage and the duration of the pulse, and inversely proportional to the inductance. So the longer the pulse, the higher the current. However, the voltage increment is also dependent on the volage of the capacitor before the pulse. If the capacitor is fully discharged the voltage increment is maximal, and it rapidly decreases when the voltage of the capacitor rises.
Based on the equations it is possible to construct a graph which gives the voltage increment as a function of the capacitor voltage. In Fig. 2.3 this graph is given for three different pulse lengths. In fact the graph in Fig. 2.3 gives the voltage increment per 4 pulses. The reason for this is that the voltage of the capacitor is only measured once every converter 4 pulses due to speed limitations of the AD converter and the software. So the decision to give another set of pulses can only be taken every 4 pulses, so that the minimum voltage increase can also only be due to 4 converter pulses. What we notice from Fig. 2.3 is that for the standard pulse length of 20 us, the voltage increment when the capacitor is completely discharged can be quite large (7-8 V), although it drops quite rapidly when the capacitor becomes a bit charged. In order to increase the voltage resolution for very low output voltage, a bit arbitrarily voltages below 50 V, it is therefore better to reduce the pulse length to 5 us. In that case the output voltage increment (per 4 output pulses) will never be more than 0.5 V.
The high voltage divider
Sometimes very small and subtle changes can have a big impact. This was also the case with the resistive voltage divider network which reduces the 0 – 400 V output voltage of the anode and screen boost converters to a for the AD converter more acceptable 0-5 V. The story starts with the observation that the datasheet of the 16F874 specifies that the maximum impedance of a voltage source connected to any analog input of the controller should not exceed 2 k. This rule of thumb on one hand has to do with the settling time of the sample and hold, and on the other hand with the fact that the current drawn by an analog input is about 500 nA.
The voltage divider I used in the Version 2 uTracer, and that I also want to use for the Version 3, has an impedance a bit less than 6k8 and thus violates this rule somewhat (Fig. 2.4 left). The values for R1 and R2 are in fact a compromise between maximum source impedance to the AD converter and on the other hand current drawn by the voltage divider. Already with R1 + R2 = 560 k the current through the divider at maximum output voltage is in the order of 1 mA. This does not seem much but at 400 V it represents 400 mW resulting in longer charging times and unwanted discharging of the reservoir capacitor during the measurement pulse, so I certainly didn’t want to decrease the resistance values.
Figure 2.4 Connecting the high voltage divider
At first hand, the left hand drawing in Fig. 2.4 might seem the most obvious and logical way to connect the high voltage divider: between the high voltage node to be measured and ground. The problem with this configuration is that in this way the load current of the voltage divider itself, adds to the current to be measured! In some cases it can even be a substantial part of the measured current, especially so for high voltage / low (screen) current measurements. In fact the current through the voltage divider is one of the major causes of drift and offset in the version 2 uTracer. A very simple but effective way to solve this problem is to connect the voltage divider in the way shown in right hand schematic of Fig. 2.4. In this way the voltage divider current does not flow through the current sense resistor Rs.
This way of connecting the voltage divider is only possible if the voltage drop over Rs is very small. This is certainly the case, normally the only current flowing though Rs is the input current of the analog input of the microcontroller (Iadc) which is in the order of 500 nA. Since Rs typically has a value of 10 – 1000 ohm, the maximum voltage drop caused by this current does not exceed 0.5 mV worst case. The only other case when the voltage drop over Rs can be significant is during a boost converter pulse. This pulse is however very short and even when the AD converter happens to sample the input exactly at this moment, Schottky diode D2 will limit the voltage drop to 0.2 V.
Testing Directly Heated Cathode Tubes
One of the major drawbacks of the version 2 uTracer is that it is impossible to test tubes with a directly heated cathode using the internal supply for the filament. The reason is that the anode current has to follow a path through the NMOS transistor in the filament supply to reach ground.
Figure 2.5
| to top of page | back to homepage | to part I |
For some time I have been looking for a suitable box for the uTracer project. As with all my project I don’t like to just buy or order a box from a catalogue or the internet. Part of the fun is to find something old which has been discarded and then try to give it a new life again. For some time I had my eye on an old “automatic printer port switch.” The box was just large enough to hold the electronics, while the top of the box had enough area for a variety of tube sockets. But the box was made out of metal, and metal working is not one of my favorite jobs.
Then a colleague of mine (“Klaus”) moved out of our building to another site on the Campus. People on the move in laboratory environments always offer great opportunities to electronic hobbyists, since people tend to go through their stuff and throw away a lot of interesting things! In the mean time people know me quite well so it happened that Claus came to me with a very pretty plastic box with the question if I had any use for it? Although the front and back plates were missing it was ideal for this project!
Figure 3.1 A box for the uTracer. Different cards show how to connect the most commonly used tubes. Click here to download the PowerPoint template.
The box is of a particular sturdy German quality, strong enough to hold the tube sockets in it’s top surface. The holes for the sockets were easily made with my good old fretsaw. In Dutch a fretsaw is called a “figuurzaag,” and I have to admit that before writing this
section I had absolutely no idea what the English word for it was, which just shows that writing these pages is not just a wast of time. My Fretsaw is one of those almost obsolete pieces of equipment that I wouldn’t like to miss although I only use it a few times a year.
To configure the uTracer for a certain tube, I used the very straight forward wiring method using miniature banana plugs. The plugs in the top row (Fig. 3.2) are connected to the pins of the sockets. The plugs in the bottom row are connected to the terminals of the uTracer electronics. Normally such a method to connect the tubes is not recommended because of the inherent safety problem. When disconnected during measurement the wires can carry a lethal voltage. However, in this case when using pulsed measurements the danger is a bit less as compared to the case when the wires would have carried a DC voltage. On top of that there is a big red light flashing on the front panel when a measurement is in progress. Different plug colors were used for different terminals: red for the high voltage anode and screen connections, black for the cathode, yellow of the control grid and green for the filament. There is a double row of bottom plugs so that it is possible to connect more than one tube pin to the same terminal, e.g. in the case when the suppressor grid of a pentode is not internally connected to the cathode. On the right side there are two separate plugs which are connected to a 1.5 V battery. These are used for very fragile battery tubes e.g. from the Dxx96 series.
The position of the plugs in the bottom row was chosen such that for the most commonly used noval tubes a straightforward wiring scheme can be used, e.g. most noval tubes have the filament between pins 4 and 5 so the connections for the filament in the bottom row have been positioned opposite to the plugs for those pins. In PowerPoint a simple template was designed which - when cut out - fits neatly around the plugs. The idea is to design a series of cards for the most commonly used tubes. Just so that I don’t lose the file myself, if can be downloaded here.
Figure 3.2 The tube sockets and their wiring.
A major concern was the adequate suppression of oscillations in the tube circuit. Martin Forsberg from Sweden kindly pointed me to some of the tricks the designers of AVO used to suppress oscillations in their legendary AVO MARK IV tube tester. First of all they connected the wires connecting the different tube sockets in loops. For example a wire starting from banana plug no. 1 is connected to pin 1 of the first socket, then to pin 1 of the second socket etc, and finally ends again on banana plug 1. Secondly, they made abundant use of EMI suppression beads. These beads are made out of a lossy ferrite and they can be shifted over a wire. They don’t affect the DC resistance but introduce losses at RF frequencies. The aim is to introduce so much losses at RF frequencies that oscillations are prevented. I used 6-hole ferrite beads in series with the wires going to and coming from the banana plugs. I don’t know exactly what type they are, but they must be similar to these from Weurth. At three different places in the tube wiring loops small RF suppression beads from Wuerth (product number 74270015) were shifted over the wires (available from Farnell). I don’t know if all these precautions actually made the difference, but it is a fact that the whole tube socket assembly in combination with the uTracer v2 hardware is oscillation free for all the tubes I have tested so far.
On the front panel of the box there is a big analog meter and selector switch so that it is possible to monitor the voltages of the boost converters and the filament. The push button on the top is an emergency stop button I want to implement in the version 3. It will also contain a lamp which will flash when a high voltage is present at the terminals. When the circuits in the box have their final positions, I will post some more pictures!
| to top of page | back to homepage | to part I |
Until now the firmware boost converter control is only partly interrupt based. A loop in the “main program” continuously measures the output voltages of the boost converters, compares the measured values against their respective set points and then, depending on the outcome of the comparison, sets or resets a control bit which signals the interrupt routine to start or stop with generating boost converter pulses. The interrupt routine itself is called every 100 us, corresponding to a 10 kHz repetition rate. It first checks the control bit of each boost converter. If the control bit is set, the boost converter pulse output is made high (transistor on). The routine then waits for 20 us (the nominal pulse length), and then makes all pulse outputs low (transistors off). After this the routine returns to the main program. Note that in this way the interrupt routine consumes 20% of the cpu time which is mainly spend on waiting (more info).
Working on and with the uTracer2 I realized that this way of controlling the boost converters is far from ideal. The main problem is that when the main program in between measurements needs to spend some time on something else like communications, the boost converters need to be switched off. As a result the output voltages of the converters drops with as one of the main consequences that the negative supply voltage drops, completely upsetting the analog circuitry, sometimes even resulting on a sort of latch-up in the grid-pulse circuit. All in all a good reason to think about how things can be arranged in a more sensible way. Additionally, in the previous section it was concluded that in order to accurately control the output voltage of the anode and screen boost converters in the low-voltage range, the boost converter pulse needs to be reduced to 5 us for voltages below 50 V. So to summarize the requirements for the new boost converter control firmware:
The most straight forward way to implement these functions in the interrupt service routine would be to first measure on each call the output voltage of each of the boost converters, to then decide which output voltage is below the set point, and finally to pulse only those boost converters whose output is too low. Unfortunately life is not that simple. In the datasheet of the 16f874 we find that the AD conversion time consists of two components. The first component is the “A/D Acquisition Time, Tacq,” it is the time needed to charge the sample and hold capacitor after a new AD input channel has been selected. The datasheet specifies the minimum Tacq as 20 us. The AD conversion itself takes a minimum of twelve Tad cycles, with a minimum Tad of 1.6 us resulting in a minimum 10 bit conversion time of 12 * 1.6 = 19.2 us. So in total one AD conversion takes approximately 40 us. Obviously the straight forward method will not work since already the four conversions take up at least 160 us, which is longer than the 100 us interrupt service routine repetition time.
Figure 4.1 Interleaving of the pulse generation and the AD acquisition / conversion in the interrupt service routine.
One solution to overcome this problem is to measure only a single boost converter every interrupt call. This implies that each boost converter is only evaluated every fourth interrupt call, which still amounts to 2500 samples per second! Automatically this means that the boost converter pulses can only be issued in multiples of four. This is also the reason why in Fig. 2.3 I have given the voltage increment of the buffer capacitor per four converter pulses. Actually a single AD conversion sequence aligns surprisingly well with the boost converter timing. Figure 4.1 illustrates how the AD conversion and the evaluation can be interleaved with the boost converter pulse interrupt routine. The top bar represents the time axis and the timer interrupt every 100 us. After an interrupt, the service routine first selects a new analog channel for the evaluation of the next boost converter to be evaluated. Immediately after that the routine starts a new boost converter pulse. This boost converter pulse takes exactly 20 us, the same time needed for the AD acquisition. After these two time critical steps have been taken, the routine has about 20 us of time to evaluate the AD results obtained during the previous interrupt call. During this evaluation the actual boost converter voltage is compared to the set point and based on that a flag is set to indicate that during the next call to the interrupt service routine a boost converter pulse for this particular converter needs to be issued. After about 20 us the boost converter pulse(s) are ended and the actual AD conversion is started. After this the routine exits and execution of the main program is resumed. The AD conversion itself is therefore performed in parallel with the execution of the main program. The timing parameters for the AD conversion need to be set such that the AD conversion is ready before the next interrupt call.
Figure 4.2 Every call to the interrupt service routine the boost converters are pulsed (if needed) but only one AD conversion is started and evaluated.
The whole process is also illustrated in Fig. 4.2 for the case when there are four boost converters. Every time when the interrupt service routine is called, the results from the previous AD conversion are digested while an AD conversion for the next call is started. After four calls the loop starts all over again. To do all this in just one routine would require quite some overhead (speed) in the form of “IF call=1 THEN … ELSEIF call=2 THEN … ELSIF call=3 THEN … ELSE …” statements. To avoid this, four different routines are used, each one only having a single branch in the form of “IF call=1 THEN this_routine” statement at the beginning.
Mask bytes
Actually the whole situation is a bit more complex. We not only need to generate boost converter pulses of 20 us, but in some cases also pulses of only 5 us. We have seen that for accurate regulation of anode and screen voltages below say 50 V, a boost converter pulse of only 5 us gives a much better control of the output voltage. One way or the other this has to be implemented in the interrupt service routine.
Figure 4.3 The use of “mask-bytes” to switch the boost converters on.
The biggest problem here is speed: in the interrupt service routine there is not enough time to do extensive branching and or computation, so the algorithm which has to decide if a pulse needs to be 20 us or 5 us has to be implemented as efficiently as possible. The good news is that the information about the pulse length is already known at the beginning of a measurement cycle.
The implementation I have used here uses “mask bytes.” To explain how it works we assume that the boost converters 1 to 4 are connected to PORT_A,0 to PORT_A,3 (Fig. 4.3 left). So when PORT_A,0 is made high, boost converter 1 is pulsed. Now, the information which boost converter needs to be pulse is stored in the “mask byte” (Fig. 4.3 left). By now simple “OR-ing” the mask byte with PORT_A, and storing the result in PORT_A, the boost converters whose corresponding bit in the mask byte was set high is pulsed. The bits in the mask byte in turn are set or reset by the AD conversion part of the interrupt service routine itself.
In reality it is even a bit more complex because also the main routine must be able to enable or disable each individual converter. That information is stored in byte “converter_enable” (Fig. 4.3 right). The results from the AD conversion evaluation are stored in byte “pulse_converter”. A logical AND between the bytes results in a “1” for the converter that needs to be pulsed, so “OR-ing” this result with PORT_A will activate the appropriate converters. In this way up to 8 converters can be controlled simultaneously using only three instructions (= 600 ns).
Figure 4.4 The use of “mask bytes” to switch the boost converters off.
A similar trick is used to decide which converter needs to be switched off after 5 us. Again a mask byte is used which is programmed by the main program already before the start of a measurement cycle. When a particular converter needs to be switched off after 5 us, the corresponding bit in the mask byte is made 0 while all the other bits are “1” (Fig. 4.4). By simple “AND-ing” the mask byte with PORT_A and storing the result in PORT_A again, the corresponding converter pulses are terminated. The whole procedure takes only 2 instructions (= 400 ns). After in total 20 us all converter pulses are terminated by “AND-ing” zeros for all the converters into PORT_A.
Confused? So am I, but it is all very efficient and fast!
| to top of page | back to homepage | to part I |
People who have followed this uTracer project from the start, will no doubt recall that in version 1 of the uTracer the tube was pulse by switching the anode and screen voltages on with a “high side” transistor switch. This concept caused a lot of problems, mainly because it is very difficult to find an affordable high voltage pMOS transistor and because it was difficult to implement a reliable over-current protection. Additionally, the direct coupling between the high voltage and the low voltage controller electronics posed the thread that in case of a mal function the controller electronics can easily be destroyed, as it did in one occasion. Basically these are the reasons why in the version 3 uTracer the switching function is done by the tube itself which is a very rugged switch which can be easily overloaded. However, this concept also has several drawbacks:
The high voltage switch (again)
I spend quite a long time thinking about a circuit topology which uses an nMOS transistor to switch the anode and screen voltages. As expected that is not so easy. The only circuit topology that I came up with is the standard solution which uses a pulse-transformer. However, the pulse length is on the long side for a pulse transformer, resulting in high inductance values so that I probably would end up using a custom made transformer, something which would make me very unpopular with my readers.
So almost unavoidably we are stuck with either a pMOS or a pnp transistor. I made a search for a good high voltage pMOS. It is really surprising how few discrete pMOS devices with a breakdown above 300 V are on the market. One of the few devices I could find is the STD3PK50Z from ST, and even this device is only available for evaluation purpose only. The reason for this is surprising and something I need to dive into one of these days. The situation is a bit better for pnp devices, although also here the choice is rather limited. One of the most common medium power pnp devices available is the MJE350 with a BVceo of 300 V. This transistor is offered at prices less than 1 euro by e.g. Farnell. A similar transistor with a BVceo of 350 V is the BF588 of NXP. Unfortunately this transistor is less commonly available.
Figure 5.1 BVceo measurement of an MJE250 compared to a BF588
Figure 5.1 shows a measurement of the BVceo (openbase collector to emitter breakdown voltage) for both an MJE350 (left) as well as an BF588 (right). The vertical axis shows the collector current while the collector-emitter voltage is sweeped and displayed on the horizontal axis. The bottom curve is for Ib = 0 while for every next curve the base current is incremented with 5 uA. For the MJE350 we find a BVceo of ca. 420 V and for the BF588 ca. 500 V. Read more about breakdown voltages in diodes and transistors Here. Although the BF588 has a somewhat higher BVceo and also a higher HFe, I will try to use the MJE350 because it is so commonly available and very cheap. Considering the BVceo of 420 V it will be best to limit the test voltages to 350 V.
Figure 5.2 Principle of the “opto-coupled” high voltage switch (left), and the circuit implementation of the floating battery with a capacitor (right)
Figure 5.2A shows the concept of a “high-side” pnp switch which is controlled by an opto-coupler. T1, D1, C1 and L1 represent the high voltage boost converter. Transistor T2 and R1 form the discharge circuit. Recall that when the new set-point value for the boost converter is lower than the current output voltage, the discharge circuit first discharges the buffer capacitor C1 to a value below the set-point before it is charged again to the new set-point. The pnp switch has again been implemented as a Darlington to be able to completely pull T3 deep into saturation with a minimum of base current. In this conceptual diagram the base current for T4 is provided by a separate battery which is floating with respect to ground. R3 and R2 are selected such that when phototransistor T5 starts to conduct, Darlington T3/T4 will be driven into saturation.
So far so good, but how to implement a floating battery? I have to admit that it took me quite some thinking to figure out an elegant solution. The trick I came up with in the end is explained in Fig. 5.2B. As can be seen the battery is replaced by the small capacitor C2. The capacitor holds enough charge to be able to drive the pnp Darlington for 1 ms. But how to ensure that the capacitor is always charged? A simple resistor wouldn’t work because that would charge the capacitor to the maximum voltage which can be as high as 350 V, way too high for the opto-coupler. A simple zener diode of say 10 V limits the voltage, but causes a leackage current which would unnecessary load the boost converter. The simple trick was to replace the resistor with the discharge circuit consisting of T2 and R1. The value of R1 is relatively low (ca. 10k) so that C2 is very quicky charged. The beauty of the thing is that in this way the discharge circuit serves two functions: to discharge C1 before a charge cycle, and at the same time to quickly charge C2.
A few back of the envelope calculations confirm the validity of the concept. Suppose we take for C1 a capacitor of 1 uF. We don’t want to use an electrolytic capacitor because they possibly might have a too high self-discharge rate. With a zener diode of 10V, the longest charging time occurs when C1 is at its minimum voltage of Vcc = 20 V. In this case the minimum charging current is (20-10)/10k = 1 mA. So to charge C2 to 10 V in the worst case requires: (V*C)/I = (10*1E-6)/1E-3 = 0.01 s. Suppose on the other hand that a base current of 2 mA is used to drive the pnp Darlington. The drop in voltage of C2 in that case amounts to: (I*t)/C = (2E-3*1E-3)/1E-6 = 2 V, which is of course very acceptable. In short the idea might very well work!
The current amplifier & over current protection
In the version 2 concept the current range switching was performed by switching between two different series resistors using a mechanical relay. These relays are not only relatively large, but also pose a reliability issue since the current can be quite large, and additionally they can introduce noise. With the current sense resistor in the concept 2 version on one side firmly connected to ground, the main source for drift and offset has been removed. It now becomes feasible to use an active amplifier to switch between the different current ranges. Experimenting with the version 2 uTracer I found that the two measurement ranges 0-20 mA and 0-200mA were a bit too limited at the low current side. It would be very nice if a 0-2 mA range could be added.
A great deal of time was spent in reviewing different circuit topographies to achieve this. The first idea was (as always) to use as much as possible standard of-the-shelf components. However, the three measurement ranges would at least require three low-offset OpAmps and some analog MUX since the number of analog inputs on the microcontroller is limited. Standard OpAmps require a -/+ 15 V power supply so that quite some diodes and resistors are needed to protect the 0-5 V ADC input of the microcontroller. All in all not a very elegant conclusion. After looking at the pros and cons of the different concepts I came to the conclusion that really the best and most elegant solution was to use a modern Programmable Gain Controlled Amplifier (PGA). The PGA113 is such a device made by Texas Instruments. It uses a single 5 V power supply with 0-5 V input range. It is controlled by a simple digital serial SPI interface which allows for the selection of one of the following gains: 1,2,5,10,20,50,100,200 (Scope gains)! On top of that it has extensive features for drift and off-set calibration. Even better is the price which is only 3 euro, even at Farnell., while the component is also available for free sampling from TI directly! Really its only drawback is that it only comes in one of these impossible 10 pin super-small outline packages (SSOP). The IC is really impossible small, but fortunately I have a few adapter PCBs to bring the pinning to standard DIL dimensions, but I am not looking forward to the job of placing it on the PCB.
Figure 5.3 Schematic circuit of the current sense amplifier and the over-current protection.
Figure 5.3 shows the principle of the current sense amplifier and over-current protection as I have it now planned. The current is measured over resistor R1. The value of R1 is a bit of a compromise. On one hand the value should be so low that even at the maximum current range the voltage drop over it is small compared to the anode voltage. On the other hand making R1 too small will make it impossible to accurately measure the low current range. With respect to the first requirement it can be argued that this argument is less serious since it is always possible to correct for the voltage drop over the current sense resistor since both the value of the resistor and the current are known. So for an AD converter with an input voltage range of 0-5 V, R1 is selected such that for the maximum current of 200 mA the input voltage is about 4 V, so R1 = 20 ohm.
Due to the direction of the current flow during the measurement pulse, the voltage drop over R1 is negative with respect to ground. OpAmp A1 inverts this voltage drop with an amplification of A=-1. Diodes D2 and D3 protect the OpAmp for any accidental over-voltage condition. The diodes D4 and D5 in combination with the current limiting resistor R4 clip the output voltage of the OpAmp to the analog power supply range to protect the PGA. The circuit around the PGA is very simple. The gain is controlled by a two wire serial SPI bus which is directly driven by the microcontroller. The output of the PGA is directly connected to one of the analog inputs of the PIC. Since the output voltage of the PGA can only be within the analog supply voltage range (0-5V) no input protection for the PIC is needed here.
The over-current protection is implemented in a very simple but elegant way. There are two ways to implement an over-current protection. The first way is to limit the current to a certain maximum value. Such an over-current protection circuit doesn’t make much sense here. Suppose that the buffer capacitor is charged to 400 V and that the current in case of a short circuit is limited to 200 mA, even in that case the momentary dissipation in the high voltage switch is 80 W. This is about 4 times the maximum specified dissipation for an MJE350. Although the measurement pulse is very short, it can very well be that this is ok, but it is on the edge of what is safe. Another over-current protection method is to immediately shut down the high voltage switch as soon as an over-current condition is detected. The measurement will be out of range and invalid anyway! My first idea was to implement such a circuit using a discrete comparator and some flip-flops. I then realized (de Wedert, Valkenswaard) that the PIC has two comparators on board which had not been used so far. Even better, the reference to these comparators is to some extend programmable so that it becomes possible to implement a programmable over-current protection. To make the response of the controller very fast, the over-current handling has to be interrupt driven, but that is no problem since the (interrupt based) control of the boost converters is suspended during the measurement pulse anyway! In this way it should be possible to respond to an over-current situation in less than a few micro-seconds, which will be small in comparison to the response time of the opto-coupler. All in all I was very pleased with this elegant solution, if I say so myself.
Table 5.1 Some system specifications based on a current sense resistor of 20 ohm.
With the gain of the PGA at 100X, the lowest measurement range is 0-2 mA. Assuming a current sense resistor of 20 ohm, this corresponds to a maximum voltage drop of 40 mV (Table 5.1). For a 10-bit ADC this results in a voltage increment per LSB of slightly less than 40 uV! This implies that the total offset of the measurement system should also be less than 40 uV, quite a challenge! The main sources for offset errors are the inverting OpAmp A1 and the PGA. For the OpAmp I am planning to use a cheap OP177. This precision OpAmp has a typical offset of 20 uV and a maximum offset of 60 uV. The PGA 113 has a typical offset of 25 uV and a maximum offset of 100 uV. So typically the offset error should be about 1 LSB, but it can add up to about 6 LSB. The OP177 has the possibility for an external offset compensation and I just will have to see in how far it is possible to compensate for the total system offset.
What is missing in this section are of course measurements and experiments. Well, the weather has been just too good and besides that my “lab” was in such a terrible state that I really had no appetite. But the mess has been cleaned up (to some extends) and the first experiments have been carried out!
| to top of page | back to homepage | to part I |
I have to admit that I had to over win quite an emotional barrier to start working on the high voltage switch again. I still vividly remember the experiments with the high voltage switch for the version 1 uTracer, which in the end turned out to be such a disappointment that the whole concept of high voltage switches was abandoned in favor of the version 2 concept which uses the tube itself as the current switch. However, after having convinced myself that the new concept as described in the previous section should represent a huge improvement over the previous high voltage switch I set to work.
Figure 6.1 Basic test circuit used to test the new-concept high voltage switch.
Figure 6.1 depicts the basic test circuit that was used in this new series of high voltage switch experiments. Regular readers of these pages will undoubtedly recognize the pulse circuit from the original test circuit. It is obvious that the pulse circuit on the left is completely galvanicly isolated from the high voltage switch. Pressing of S1 generates a pulse of approximately 1 ms. The high voltage buffer capacitor C2 is charged via a resistor of 12 k to limit the current during an accidental short circuit. The discharge transistor is emulated by switch S2. Shortly pressing S2 will charge capacitor C3 to 10V. In the experiments the configuration around the high voltage transistors T2 and T3 was varied to optimize the properties of the switch.
Limiting the current
The current limit provision consists of two mechanisms. The first mechanism was discussed in the previous section. It consists of a sense circuit which measures the current and in case of an over-current situation completely switches off the current. This part of the over current protection is completely implemented using the comparators and the interrupt mechanism of the micro-controller. However, this protection takes some time to react. First of all because the microcontroller needs time to execute the proper interrupt code, secondly because the opto coupler needs some time to completely switch off. In total the latency can add up to 20-30 us! To limit the current during this time it is necessary to implement some kind of fast current limiting mechanism.
Table 6.4 Experiment to investigate if it is possible to limit the output current by limiting the base current of the switching transistor.
The standard solution to realize this is to include a small series resistor in the emitter of the Darlington and an additional transistor which “pulls away” the base current of the Darlington when he voltage drop over the resistor becomes about 1.0 V. However, before adding another transistor I thought it was perhaps possible to do it in a more clever way. The idea was to make use of the fact that for high currents the current gain of a bipolar transistor collapses due to what we call high-injection effects. So suppose that due to a short circuit the collector current increases to values in this high injection regime. As a result the base current will more than proportionally increase due to the hFE drop-off. By simply selecting the base resistance to such a value that it can no longer supply this current, it should be possible to limit the base- and stabilize the collector current.
To test this idea the circuit of Fig. 6.1 was used with a decade resistor as load. The output voltage pulse was recorded with a memory scope and from the pulse height and the resistance value the current was calculated. The results for three base resistance values are recorded in the left graph in Fig. 6.2. We clearly see that the effect as predicted can be clearly observed. For increasing base resistance the maximum current decreases. However, it appeared that in order to reduce the maximum current to a value of ca. 250 mA, such a high base resistance is needed that for currents well below 200 mA the saturation voltage of the Darlington pair increases to an unacceptable value. Just to satisfy my own curiosity, I also tried the same idea with only the MJE350 (Fig. 6.2 Right). Here the effect was even worse. So I am afraid that reliable current limiting can only be obtained at the expense of an additional transistor.
Response time for power shut-down
As discussed previously the microcontroller shuts-down the high voltage switch when an over-current condition is detected. Obviously it is important to minimize the response time here as much as possible. The response time consists of three components: the slew-rate of the inverting OpAmp which inverts the negative voltage drop over the current sense resistor, the response time of the microcontroller, and the response time of the high-voltage switch itself. As far as the OpAmp is concerned, that’s basically just a matter a selecting a type with a very low offset and a reasonable slew-rate. The OP27E for example has an offset of 10 uV (typically) combined with a slew-rate of 3 V/us, resulting in a response time of only a few microseconds. As stated before the response time of the microcontroller is also in the order of 1 to 2 microseconds, which probably leaves the high voltage switch itself as largest contributor to the total delay.
Table 6.3 The speed of the high-voltage switch can be significantly improved by adding an additional current path to the emitter-base junctions of the transistors.
Figure 6.3A depicts on the upper trace the output voltage of the high voltage switch as measured over a 200 ohm resistor. The input voltage was set at the still relatively save value of 50 V so that the current amounted to 50/200 = 250 mA. The lower trace depicts the pulse signal driving the switch (outputs inverters N4-N7). The total pulse length was 1 ms, and the memory scope was set to trigger on the falling edge of the input pulse. Observe that the output voltage of the switch remains high for ca. 40 us and then decays with a tail of about 100 us.
The delays are caused by the fact that all the transistors in the circuit are driven deep into saturation. This means that both the emitter-base and the collector-base junctions are forward biased and are injecting large amounts of minority carriers in the base. For the transistor to switch off, these carriers first have to recombine. The “problem” is that today the quality of the transistors is just too good. By perfecting transistor technology, the recombination rate in the base has been made very small. On one hand this results in a nicely linear hFE, but on the other hand it increases switching speed. By providing an additional current path to the base, it is however possible to improve matters a bit. In Fig. 6.3B the emitter-base resistance of the Darlington was lowered to 12k. This almost completely removes the switching tail of the curve. Alternatively in Fig. 6.3C a resistor was added between the emitter-base of the photo-transistor of the opto-coupler. This simple measure decreases the high time of the output voltage from 40 to 20 us. Finally, in Fig. 6.3D both measures were implemented resulting in a nice sharp switch-off ,and a delay of only 20 us. Good enough for the time being.
The saturation voltage
The saturation voltage of a single bipolar transistor can easily be as low as 100–200 mV. Unfortunately that is different for a Darlington. As soon as the collector-base voltage of the power transistor becomes zero (the definition of the point of saturation) the collector-base junction of the driver transistor becomes forward biased thereby pulling away base current of the power transistor. The saturation voltage of the darlinton pair as a whole can therefore never be lower than approximately one build-in junction voltage (0.6-0.8 V).
Figure 6.4 Ic-Vce curves of a Darlington constructed with an MJE350 (left) and a BF588 (right).
For more information on Sidney Darlington (click here).
Figure 6.4 shows the Ic-Vce curves of a Darlington constructed with an MJE350 (left) and a BF588 (right). Note that the MJE350 Darlington, despite the significantly lower hFE as compared to the BF588, not only requires a substantially less base current for the same collector current, but also has a lower saturation voltage. The reason for both observations is presumably the fact that the high injection point for MJE350 starts at a somewhat higher current.
The relatively high saturation voltage is not really ideal. In a perfect world we would have preferred a switch with a zero voltage drop. Fortunately the voltage drop is limited to a value less than 1 V, and on top of that the voltage drop is a simple almost linear function of the current. The dashed line in Fig. 6.4A approximates the saturation voltage as a function of current and is described by I = V-0.65. So in other words the saturation voltage is given by V = I+0.65. With this simple formula the GUI software can easily compensate for the voltage drop over the transistor, as well as of course for the voltage drop over the current sense resistor and the current limit resistor.
Short-circuit proof
From the previous experiments it became clear that limiting the output current just by limiting the base current was not feasible. So a “real” current limiting circuit was implemented in exactly the same way as for the version 1 uTracer. Figure 6.5 depicts the circuit diagram of the high-voltage switch including the current limiting circuit and the current sense resistor and amplifier. The current limit circuit consists of R10 and T4. When the voltage drop across R10 reaches ca. 1 V transistor T4 is switched on thereby limiting the current through the Darlington pair. With a value of 2.7 ohm the current is limited to ca. 240 mA.
Figure 6.5 Test circuit for the high-voltage switch including the current-limiter circuit and the current sense resistor and “amplifier”.
With the current limit circuit implemented short circuit tests were performed. My initial hope was that when the current is limited, an MJE350 would survive a short circuit pulse at 350 V. With a maximum current of 250 mA the instantaneous power dissipation then amounts to 350*0.24 = 84 W. The absolute maximum dissipation for an MJE350 at 25C is specified as 25 W, but I had the hope that under pulsed conditions the dissipation could be somewhat higher. Alas, this was not the case.
Figure 6.6 A (200 V) and B (300 V) show the breakdown of the MJE350 under short circuit conditions (see text). C shows that for short pulses the switch holds up to 350 V.
Figure 6.6A depicts a measurement where the high voltage switch was pulsed for the nominal time of 1 ms at a voltage of 200 V with the output shorted. The upper trace is the pulse signal itself which is used to trigger the scope. Observe that the pulse length is about 1.2 ms. At first the switch holds and limits the current to ca. 240 mA. Then after about 300 us it breaks down (red arrow) resulting in a shorted MJE350. None of the other components were damaged. This demonstrates that the over-current switch-off loop that I want to implement using the controller is no luxury, but an absolute necessity! The problem is that this protection loop requires some time to respond. To see how far things could be stretched, the pulse length was reduced to 120 us by reducing C1 to 8.6 nF (3x 2n2). The switch again failed, but now at 300 V. Figure 6.6B shows the actual measurement. Observe that initially everything works fine and that the Darlington is switched off, then just before the Darlington is fully switched off the MJE350 breaks down.
Again the pulse length was reduced, this time to 15 us (Figure 6.6C). The delays “t_on” and “t_off” are associated with the response time of the opto-coupler, the Darlington and the inverting OpAmp. The delay “t_proc” simulates the response time of the microcontroller. So in this case we suppose that the microcontroller needs about 10 us. In reality the microcontroller will respond much faster so that this represents a worse case situation. The switch now holds for a full short circuit condition for voltages up to 350 V, possibly higher, but this was not tested.
Figure 6.7 The measurement of Fig. 6.5C repeated with different OpAmps for the current sense amplifier.
The delay caused by the inverting OpAmp is one of the more important components in the response time of the microcontroller control loop. For the selection of the OpAmp it is thus important that it has a low-offset voltage (order of 25 uV) and a high slew-rate. Just to see the difference between different OpAmps, I repeated the measurement of Fig. 6.5C with 5 different OpAmps that I happened to have “on stock.” Note that the OP177 I had originally in mind would have been way too slow. An OP27E is a much better choice with respect to speed for the same offset voltage.
Testing with real tubes
Finally the high voltage switch was tested on two real tubes, an EZ81 double diode and an EL84 power pentode. Basically the circuit of Fig. 6.5 was used, but Rload was replaced by the anode of the tube, while the cathode was grounded. The filament, and the grid in case of the EL84 were supplied from an external power supplies. The current was measured by measuring the voltage drop over the 18 ohm current sense resistor using the memory scope.
Figure 6.8 Anode current versus Anode voltage for an EZ81 double-diode.
Figure 6.8 shows a measurement of one of the diodes in the EZ81. The circles and the continuous line show the anode current versus the anode voltage as set by the “high-voltage” input of the test circuit. The squares and the dashed line give the anode current versus anode voltage from the graphs in the original Philips datasheet. As seen there is quite an offset between the curves. Especially for higher current part this offset is caused by the voltage drop over the current sense resistor which can amount to up to 4 V. Since the exact current, as well as the value of the sense resistor are known, it is straightforward to compensate for this voltage drop. In this way it is not possible to exactly set the anode and screen voltages (there will always be some deviation dependent on the current) but at least it is possible to calculate the exact anode-cathode voltage for the graphs. The measured data compensated for the voltage drop over the sense resistor is represented by the triangles. Amazingly enough the measured data now more or less overlays the graphs from the datasheet.
Figure 6.9 Anode current versus grid bias for an EL84 (Vanode = 250 V, Vscreen = 250 V).
Figure 6.9 shows an anode current versus grid bias measurement for an EL84 power pentode. The curve seems to be build up from three different parts, each part corresponding a different vertical scale setting of the scope. The left graph depicts the measured data as is, the right graph is taken from the original Philips datasheet. In the center graph the measured data graph was scaled so that the axes overlay with the datasheet graph. Again the measured data almost coincides with the graph in the datasheet. It is absolutely amazing that these tubes after being switched on again after 60 years exactly reproduce their original behaviour!
| to top of page | back to homepage | to part I |
The grid bias generator has to convert a 0 - 100% Pulse-Width Modulated (PWM) 0 - 5 V square wave from the microcontroller into a 0 to -50V voltage for the control grid of the tube. It consists of three parts:
Just as in the case of the grid-bias circuit for the version 2 uTracer, it took quite some puzzling to come to a circuit which does the job, and at the same time is simple and does not require the use of exotic components. The requirements of this grid bias circuit compared to the version 2 circuit differ in the sense that in this case the cathode of the “tube-under-test” is connected to the (unregulated) 19.5 V power supply, rather than to ground (see Section 2). So also the negative grid bias needs to be generated with reference to the 19.5 V power supply voltage. Since a new circuit needed to be designed anyway, I thought it was a good moment to review the complete circuit and make some improvements where needed:
Figure 7.1 A) basic differential amplifier circuit, B) principle of the grid bias circuit using an ideal OpAmp, C) principle of the grid bias circuit using a realistic OpAmp and a high voltage output stage.
The core of the new grid bias circuit is the well known “substraction” or differential amplifier circuit (Fig. 7.1A). Usually in the formulas given for this circuit it is assumed that R1 = R3 and that R2 = R4 resulting in the well known equation Vout = (R2/R1)*(V2-V1). However, in the more general case R1, R2 R3 and R4 all have different values. In that case the
relation between the output voltage and the input voltages is given by the equation given in Fig. 7.1A. We now tie input V2 to the 19.5 supply voltage (the cathode potential) and alternatively assume R2 = R3 = 10*R1 = 10*R4 (Fig. 7.1B). The formula for the output voltage now reduces to the equation given in Fig. 7.1 B. We define the grid bias as the voltage difference between the cathode (positive supply voltage) and the grid itself. In that case for zero input voltage the output voltage of the OpAmp is 19.5 V, or in other words: zero grid bias. When the input voltage is increased to 5 V, the grid bias linearly increases to -50 V, exactly what we need.
The circuit in Fig. 7.1B assumes a rather unrealistic OpAmp. In the first place because of the enormous supply voltage of V+ = 19.5 to V- = -30V. In the second place because the circuit assumes that the output voltage of the OpAmp can swing from the positive supply rail down to the negative supply rail. For most OpAmps, especially the ones with a somewhat large supply voltage range, this is not the case. So in the circuit of Fig. 7.1C a special output stage is added which converts the limited output swing of the OpAmp to a much larger output swing which can even go below the negative supply voltage of the OpAmp.
The special output stage basically consists of a pnp current mirror tied to the 19.5 V supply voltage rail. In principle the current flowing though T1 is mirrored through T2. The current through T1 is determined by the output voltage of the OpAmp and the value of R1. When the output of the Opamp is high, the current through R1 is low, so also the current through T2 is low, so the output voltage is low. Alternatively when the output voltage of the OpAmp is low, the output voltage is high. With R2 > R1 the output voltage swing of the circuit can be larger than the output voltage swing of the OpAmp. Since the output voltage of the circuit is fed back to the input of the differential amplifier circuit, the exact relation between the input and output voltage is completely determined by the resistors in the OpAmp circuit, just as in Fig. 7.1B. Note that since the output stage inverts, the positive and negative inputs of the OpAmp have been exchanged in Fig. 7.1C.
Figure 7.2 Test circuit used to evaluate the new grid bias circuit.
Figure 7.2 shows the circuit that was used to test the new grid bias circuit including the low pass filter that is used to convert the PWM signal to an analog signal. The filter was not used in all the measurements but instead for the graphs shown in Fig. 7.3 only a variable DC voltage was applied to R3. The left graph in Fig. 7.3 and the small insert show the grid bias – so the voltage difference between the cathode (the 19.5 supply) and the output of the circuit (the grid) – as a function of the input voltage. Note that there is a nearly perfect 10:1 relation between the input voltage and the output voltage. Below a grid bias of 1 V the output transistor T2 is driven into saturation. This causes a small deviation from the ideal 10:1 behavior as shown by the insert. The right graph in Fig. 7.3 shows for the same input voltage range the output voltage of the OpAmp.
Figure 7.3 Left: grid bias versus input voltage (insert showing detail for very low grid bias values), Right: output voltage of the OpAmp versus input voltage for the test circuit depicted in Fig. 7.2.
With respect to the final circuit diagram shown in Fig. 7.2 a few points need to be mentioned (before I forget them):
About Grid Current
A few times the grid current was mentioned in this section, but actually in normal operation – with the grid at a negative potential – the grid current is usually very small. It originates from electrons being emitted from the cathode which “accidentally” are collected by the grid (Fig. 7.4). Note that the direction of the current is pointed “into” the grid. The value of the grid current is very small. Only for very low grid bias values it has a value of any significance. For negative grid biases the grid current very quickly reduces to practically zero. Also for increasing anode voltage the grid current decreases. The maximum grid current is therefore measured zero grid-cathode bias and zero anode voltage.
Figure 7.4 Control grid current at zero grid bias as a function of anode voltage voltage for an EF80.
The value of the grid current strongly depends on the type of tube. Obviously the smaller the distance of the grid to the cathode, and the smaller the distance between the turns of the grid, the higher the grid current. As an illustration the grid current was measured for several tubes at zero anode and grid bias: EL84 Ig=-41 uA, EF80 Ig=-470 uA and ECC83 Ig=-200 uA. Figure 7.4 (left) shows the decrease of grid current for increasing anode voltage for the EF80.
| to top of page | back to homepage | to part I |
In an instrument like the uTracer, which handles voltages of several hundreds of Volts at currents of several hundreds of mA, it is obvious that an error or malfunction can easily result in the destruction of (a part of) the circuit, especially so since the uTracer is build up from sensitive semiconductors. I vividly recall how a malfunctioning high voltage switch in the version 1 uTracer resulted in a complete destruction of all the semiconductors in the circuit! Although I was under the impression that I had pretty well covered the issue of robustness in the current version 3, a remark made by one of the faithful readers of these pages, Martin Forsberg, caused me to re-think the whole robustness issue, and to make several important modifications.
Let’s first start by analyzing the potential problems:
Figure 8.1 shows in a simplified circuit diagram the most important components of the safety features that have now been incorporated into the present uTracer V3 to improve its robustness. In block 1 we find the boost converter itself. Although this is not a safety feature in itself, the fact that the amount of energy stored in the capacitor is limited obviously greatly helps. But nevertheless, at a maximum voltage of 350 V, the energy stored in the 100 uF capacitor is 0.5*C*V^2 = 6.1 J. Although this is just enough energy to raise the temperature of 1 cc water 1.5 degree, it can easily destroy a whole board of semiconductors! Block 2 in Fig. 8.1 is the high voltage switch. In this block three safety features have been implemented which have already been discussed in one of the previous sections. In the first place a current limiter limits the maximum anode / screen current to 250 mA. In the second place when an over current is detected, the microcontroller shuts-off the high voltage switch in ca. 50 us. Finally, the complete high voltage switch is galvanically isolated from the rest of the circuit by means of an opto-coupler. This isolates the micro-controller from the high voltage switch in case of a malfunction or breakdown of the high voltage switch itself.
Figure 8.1 Overview of the safety features included in the version 3 uTracer.
Block 3 in Fig. 8.1 needs some explaining. In section 2 of this page it was explained that by referencing the cathode to the supply voltage rather than to ground it becomes possible to apply anode voltages down to zero. We have already seen that it is very simple to protect the filament driver circuit against high voltages by clamping the filament terminals to the cathode with two diodes (D4,D5), or in other words to the supply rail. Similarly the grid bias circuit can also be protected with a simple clamp diode (D6). The consequence is however that both during normal operation, as well as when the protection diodes are activated, the current is dumped into the supply rail rather than to ground! Potentially this can “lift” the supply rail and in that way cause damage to the rest of the circuit or even the power supply.
In the further discussion of the consequences we consider two cases. In the first case the high voltage switch and current limiting circuit function as they should. This means that the maximum current is 250 mA
for a pulse duration of 1 ms. Under these normal circumstances it should be sufficient to simply decouple the power supply with a large capacitor of say 1000 uF. A pulse of 250 mA for 1 ms in a 1000 uF capacitor will result in a voltage increase of only (0.25*0.001)/0.001 = 0.25 V. However, let’s now assume that for one reason or the other the high voltage switch fails, so that the complete charge of the boost converter reservoir capacitor is dumped in the power supply rail. If no special precautions are taken, this may result in very high voltages on the supply rail indeed!
To be absolutely sure that even under these unusual circumstances no damage is done to the rest of the circuit, that part of the supply rail which is connected to the cathode and the protection diodes is isolated from the main supply rail by means of diode D3. The voltage on the isolated part is limited to 24 V by means of zener diode D7. This special surge protection diode is especially designed to handle short pulses of high currents. When D7 starts conducting, the current will very quickly increase, “blowing” a fast acting 500 mA fuse to prevent further damage to the capacitor.
The last thing that needs explaining is the function of transistor T6. As explained, during normal operation every measurement pulse will inject current into the supply rail. Since now the supply rail has been isolated by means of D3, these current pulses may cause a charging of C4. Although some of this charge will leak away through the grid bias circuit, T6 was added to be sure that C4 is reset before every measurement pulse. The same 10 ms pulse which drives the transistor that charges C3 is used for this purpose. A simple bleeder resistor could also have been used, but since C4 is quite large it is difficult to select a resistor value so that the resultant time constant is small enough without causing too much dissipation.
| to top of page | back to homepage | to part I |
The uTracer V2 has two inverting boost converters generating two negative power supplies. The first one just generates the “unregulated” -20 V negative supply voltage for the analog electronics. The second boost converter is adjustable between -20 V and -65 V depending on the grid bias range. At the time of the design of the V2 it already seemed a waste to use two boost converters. Why not use only the variable -20 V to -65 V supply and derive the -15 V power from that one? Well, the gap was just too big. Using a single linear regulator is difficult because the maximum voltage difference they can bridge is usually less than 40 V (32 max input voltage for a 79XX, and 40 V difference for an LM337). Using additional components would reduce the benefit of having a single boost converter while the waste of power would also be significant.
On the 16th of November (2011) I happened to be at a conference in Berlin which was not particularly interesting, so that I had some time to scribble some circuit diagrams on a piece of paper, waiting until I had to give my own presentation. Playing with the idea to simplify the negative power supplies, it occurred to me that, because the measurement principle in the uTracer V3 design is different from the V2, the negative grid power supply is now only -40 V and fixed! This changes things completely because now a single simple LM337 (the negative sister of the well known LM317) can be used to generate the required -15 V for the analog electronics thereby eliminating a complete inverting boost converter!
None of the boost converters in the uTracer have been designed for delivering any substantial amounts of power. The first question therefore was: can a single boost converter generate enough power to supply both the grid bias circuit, as well as the analog electronics, in total an estimated amount of 40 mA worst case? I know that 40 mA doesn’t sound like a lot, but at 40 V it nevertheless amounts to 1.6 W. I still find it amazing that for a relatively “tricky” circuit like a boost converter it is so easy to calculate the maximum output power.
The proof of the pudding is of course always the experiment. Two versions of the negative power supply were tested to see if, giving the timing signals already established, they could deliver 40 V at least 40 mA. The first versions again uses a simple BD138 (BD140 will also work) as a switch, the second version uses a IRF9540 p-type MOSFET. The reason why I prefer to use a bipolar transistor here and not a MOS transistor has a very practical reason. An inverting converter requires a pMOS device rather than an nMOS device and pMOS devices are just not that common. I only have a few of them, but I do have a whole pile of BD138s!
Figure 9.1 Testing of a bipolar and MOS version of the negative power supply.
Figure 9.1 shows the two converter circuits tested. The timing signal driving the BC547 transistor was generated by my pulse generator set at a pulse width of 20 us at a repetition rate of 10 kHz and an amplitude of 0 – 5 V. These conditions are identical to the output pulses of the micro-controller when it is driving the converter for maximum output voltage. The circuit with the bipolar transistor is identical to the circuit used in the V2 uTracer. The version with the pMOS transistor is almost identical with the exception that a zener diode was added to limit the maximum gate-source voltage to 10 V. The circuits were tested by applying different load resistors and recording the corresponding output voltage and current.
As expected the circuit with the pMOS transistor performed slightly better than the circuit with the BD138 (Fig. 9.1 center). Especially at lower currents (higher output voltage) the MOSFET version was significantly better. However, for an output voltage of –40 V the difference was so small that I will just stick with the bipolar version, especially since efficiency is not an issue here. Note that I replaced the 1N4148 diode from the original uTracer circuit with a fast switching HER108G diode. It didn’t give any improvement, but I think the HER108G is a bit more robust in this circuit, while it is still one of the cheapest diodes of its kind available.
Monitoring the grid bias
Apart from the fact that skipping a whole boost converter saves a lot of “real estate” on the PCB, it also releases one of the analog AD-converter inputs from the microcontroller so that it can now be put to better use! One of the options is to really monitor the grid bias during the measurement pulse. You will recall that in the present design the grid bias is set by programming one of the PWM generators on board of the controller. We then have to rely on a proper functioning of the electronics to make sure that the correct grid bias is really set. It would be nice to have a way to check the proper functioning of this circuit.
The AD converter input covers a voltage range of 0 to 5 V. If we take the ground of the microcontroller as a reference, then the grid bias ranges from 19.5 V to -40 V. The reason for this is of course that the cathode of the tube is referenced to the power supply voltage. So we need a circuit than can map an input voltage of -40 V to 20 V to 0–5 V. It appears that three resistors can do the job.
Figure 9.2 Design of a three branch voltage divider circuit to monitor the grid bias
The top circuit in Fig. 9.2 shows a three branch voltage divider circuit. One branch is connected to +5V, one branch to Gnd and the third branch is connected to the grid. Note that the circuit which takes care of actually generating the grid bias is not shown in this figure. The central node denoted here by Vx is connected to the AD input of the micro controller. Without R3, R1 and R2 will set Vx so some value between Gnd and 5 V. The question now is how to pick values for R1, R2 and R3 in such a way that when Vg is 20 V, Vx will be pulled up to 5 V, while when Vg is -40 V, Vx will be pulled down to Gnd. First the currents I1, I2 and I2 flowing through the resistors are calculated for a certain Vg and Vx. According to Kirchhoff’s Law the sum of all the currents flowing to a certain node has to be zero. From this we can derive an equation which gives Vx as a function of Vg in which R1, R2 and R3 are “unknowns”. We know two Vg and Vx pairs which have to satisfy the equation: (Vg,Vx)=(20,5) and (Vg,Vx)=(-40,0). Substituting these datapoints into the equation we find two relations which give R2 and R3 when R1 is known. We can now simply pick a value for R1 that will set the current levels in the voltage to an acceptable level e.g. R1 = 10k, we then find R2 = 20k and R3 = 60k. Finally two Schottky diodes are added to protect the micro-controller input from any over or under voltage conditions which might arise from improper functioning of other parts of the circuit. At this moment I am not sure if I am going to implement the grid bias monitor, perhaps I want to use the analog input for something else. Nevertheless I added the calculation here for my personal documentation.
| to top of page | back to homepage | to part I |
One of the most important tube parameters is the transconductance. The transconductance tells you something of the intrinsic capability of the tube to amplify signals. The transconductance is defined as the ration of the variation in anode current as a result of a small variation in grid voltage at a certain bias point. The unit in which the transconductance is expressed should be A/V or S (from Siemens). Typical transconductance values range from 0.001 to 0.015 A/V. I have noticed that in Europe the transconductance is usually specified in mA/V, so that typical values range from 1 to 15 mA/V. In the US it is more common to express the transconductance in “mho”, which is “ohm” written backwards. So 1 A/V = 1 S = 1 mho. Rather than expressing the transconductance in millimho’s is has become custom to express it in micromho (1000000 micromho = 1 mho) so that the typically transconductance range becomes 1000 – 15000 micromho.
There are basically two ways to measure the transconductance. In the first method the anode current as a function of the control grid bias is measured and plotted. To find the transconductance at a certain bias point, the tangent line to the curve is constructed at that bias spoint.
The transconductance is the slope of the tangent line. It is actually this method that I had planned to use for the uTracer V3. The Idea I had was to measure the Ia(Vgk) curve, interactively fit a best polynomial through the measured data, and then analytically determine the slope of the curve in every point. In this way any measurement noise is suppressed and a nice smooth transconductance curve is obtained.
In the second method the transconductance is obtained under real AC conditions. A small AC signal is added to the grid bias and the corresponding AC anode current is measured. The transconductance is found by dividing the amplitude of the anode current by the amplitude of the AC grid voltage. An example of a transconductance tester which works this way is the RAT tube tester designed by Steve Bench. Now, certainly for frequencies which are so low that inter-electrode capacitances, and the time it takes for the electrons to travel through the vacuum of the tube can be neglected, both methods should yield exactly the same result. However, in the world of electron tubes exact science very often has to compete with emotions and feelings. So it is therefore not surprising that there is a large school of people who definitely swear to especially the AC method. Although I am myself convinced that indeed both methods should yield exactly the same result, I nevertheless spend the past weeks thinking if and how an AC transconductance test could be included in the uTracer V3 as an option. I summarize the main ideas here in this section for my documentation. The circuits presented in this section were not tested, they are at this moment just “paper ideas.”
Before drawing schematics, let’s look at some figures. As mentioned the transconductance of most tubes varies between 1 mA/V and 15 mA/V. On the lower side we find e.g. some of the battery tubes: DL91 1.57 mA/V @ 8 mA, or the DL96 with 1.4 mA/V @ 5 mA. On the higher side we find many of the popular audio amplifier tubes: EL84 11.3 mA/V @ 48 mA, EL34 11 mA/V @ 100 mA and the EL38 with 14.3 mA/V @ 100 mA. But these are transconductances at the optimal bias point. To measure a full transconductance curve the tester should be able to measure also transconductances which are considerable smaller, say at least a factor of 10, so down to 100 uA/V, preferably smaller. On the high side we will assume a maximum transconductance of 30 mA/V. The amplitude of the AC voltage that is applied to the control grid has to be sufficiently small to assume small signal operation. A common value that is used is 100 mV(pp) (top-top). This means that the amplitude of the anode current will range from 10 uA(pp) to 3 mA(pp).
Figure 10.1 Injection of the AC signal into the grid bias circuit.
Before we look at the problem of how to measure the AC component in the anode current, we first have a look at how the AC voltage can be added to the control grid. The first question that needs to be answered is what frequency to use for this AC signal. Most commonly a 1 kHz signal is used. However, in the utracer the length of the measurement pulse is 1 ms which would amount to one period of the AC signal. The frequency of the AC signal should be as high as possible, but still in the audio range. I thought 20 kHz would be still an acceptable value. At that frequency exactly 20 periods of the AC signal fit into the length of a single measurement pulse. My first idea was to let the microcontroller generate a 20 kHz square-wave signal and then use an active 20 kHz bandpass filter to turn it into a sinusoidal signal. A much simpler solution is to use a simple fixed frequency single transistor phase-shift oscillator that can be turned on and off by the microcontroller.
Figure 10.1A depicts how the sinusoidal signal is injected into the control grid bias circuit. The advantage of injecting the signal at the negative input of the OpAmp is that at this point we have a constant and well defined impedance of 12.1k//121k = 11k so that the amplitude of the AC signal is independent of the control grid bias. To calculate the amplitude of the signal we have to inject to obtain an amplitude of 100 mV on the control grid, the equivalent circuit of Fig. 10.1B is used. Here the high voltage driver stage consisting of T1/T2 are assumed to be part of the OpAmp. Since this stage the inverting and non-inverting inputs of the OpAmp in Fig. 10.1B are exchanged compared to Fig. 10.1A. We find the relation between the output voltage and the input voltages by firsts finding the relations for the voltages at the inverting and the non-inverting inputs of the OpAmp and then equating these relations:
Observe that the amplitude of the AC component in the grid voltage equals 11*Vosc. So for 100 mV amplitude grid bias a signal with an amplitude of 100 mV / 11 = 9 mV has to be injected.
Measuring the AC component of the anode current during the measurement pulse is less trivial. Figure 10.2A depicts the most straightforward approach. As recalled, the DC anode current is measured across a small resistor between ground and the high voltage buffer capacitor. Naturally also the AC component of the anode current will appear across this resistor. The AC component may be obtained by simply decoupling it from the DC component with a suitable capacitor. Some rudimentary showed that this option will work, however the magnitude of the AC signal is very small. The reason is that the value of Rs is fixed by the DC measurement requirements. Assuming a maximum current of ca. 150 mA, the value of Rs will be ca. 30 ohm to obtain a full scale input for the AD converter. With an AC anode current as small as 10 uA(pp), this will give an AC voltage as small as 300 uV(pp). Measuring a signal with such a small amplitude in a 1 ms time frame is possibly not un-do-able, but it is far trivial.
Figure 10.2 Three ways to retrieve the DC and AC components from the anode current.
It would be great if there was a way to obtain a larger AC signal. The simplest way to do that is to measure the AC component across an inductor (Fig. 10.2B). The impedance of 1 mH inductor at 20 kHz for instance is already 2*pi*f*L = 125 ohm. This is already a factor 5 improvement. However, there are (at least) two arguments against pursuing this route. In the first place one has to realize that the inductor also has to “digest” the transient from the measurement pulse itself. The larger the inductance value, the more time it will take for transient voltages to settle. The other argument is more serious: using a setup as shown in Fig. 10.2B the measured AC signal will be the sum of the DC and the AC signal. Although it may be possible to disentangle them again, it is messy and reminds me of all the offset and drift problems I had with the V2 uTracer.
By far the best solution is to replace the inductor by a transformer (Fig. 10.2C). This has two huge advantages: by connecting one side of the secondary turn to ground, both the (pulsed) DC as well as the AC components of the current can be decently measured with respect to ground. Secondly by using a turns ratio >1 an offset free “amplification” of the AC voltage is obtained! I know that transformers are extremely un-popular among amateur (and I guess also many professional) electronics enthusiasts. However things are not as bad as they seem. The German company Wuerth Elektronik produces a large range of flyback transformers among them some very suitable types. An example is the LT3748 (Wuerth manufacturing code 750311486), which can be ordered from Farnell (Farnell product number 1895729). This tiny transformer has a primary winding of 100 uH which saturates at 2 A. It has secondary windings which each have a turns ratio of 10 with respect to the primary winding. So by placing the secondary windings in series a 1:20 turns ratio can be obtained. The impedance of the 100 uH primary turn at 20 kHz is 2*pi*f*L = 12.5 ohm, the transformer will “up-transform” the voltage drop over the primary inductance by a factor of 20. A 10 uA(pp) anode current will now appear as a 2.5 mV(pp) signal which starts to appear do-able. Before looking more into detail in the working of the transformer, let’s first have a look at how the rest of the measurement circuit could look like.
Figure 10.3 Detection of the AC anode current.
One of the simplest ways to measure the amplitude of the AC signals is probably to use a simple peak detector. Figure 10.3 represents the basic layout of such a circuit. First the still rather small signal from the transformer is amplified by the high input impedance amplifier circuit around A1. The circuit around A2 is basically a combination of a peak detector and a sample and hold. When T1 is open, OpAmp A2 continuously compares the voltage on the capacitor with the input voltage. When the input voltage is higher than the voltage on the capacitor the capacitor is charged via D5 until both voltages are equal again. When the inout voltage is lower than the voltage on the capacitor, the output of the OpAmp becomes negative. Diode D5 is now blocking so that the voltage on the capacitor will remain constant. By switching on T1 the capacitor can be discharged. The idea is to leave T1 switched on well into the measurement pulse until we are sure that all the transients as a result of the measurement pulse have died out and then to open it so that the peak values of the signal can be obtained. Since the measurement frequency is 20 kHz, we know for sure that after 50 us the peak value is stored. AD conversion should take place within the measurement pulse to skip the transients at the end of the measurement pulse. The peak value
Obtained this way is further amplified with the same Programmable Gain Amplifier that was used to measure the DC current, but this time using the second input channel. Assuming that the maximum transconductance to be measured is 20 mA/V, and using a 100 mV(pp) AC grid signal, an AC anode signal of 2 mA(pp) is obtained. Using the 100 uH 1:20 transformer this will result in a voltage at the input of A1 of 500 mV(pp). With a gain of about 10x this would just result in a full scale readout of the AD converter. Assuming an input offset voltage of 15 uV for OpAmp A1 this will result at an output offset voltage of 150 uV, which is a factor 10 lower than the minimum expected input signal, in other words not too serious. A transformer with a somewhat higher primary inductance and higher turns ratio would have helped enormously to further reduce the offset in the lowest measurement range. Unfortunately I could not find such a transformer as an of-the-shelf component, but perhaps when all this works so far, I will make one myself.
Figure 10.4 Christmas 2011! This project is now underway for exactly a year. The project is actually one of the most interesting projects I have ever undertaken. It combines everything: analog / digital electronics, assembler and high-level programming, and above all vintage radio-tube technology. For me personally it has been a turbulent year, but this project has brought some sense in my life and kept me going. The past weeks have been spent cleaning up my “laboratorium” as I always call my hobby room at home, and I am now spending a very quiet en peaceful X-mass holiday assembling the version 3 uTracer, which is making excellent progress!
| to top of page | back to homepage | to part I |
In section Fully interrupt based boost converter control
(Part I) it was explained how the boost converters can be controlled by an interrupt routine which runs completely in the background. In this way we don’t have to concern ourselves with the control of the boost converters in the main program, and they can remain “on-line” all the time thereby eliminating some of the problems encountered in the version 2 of the uTracer. In the mean time the routine has been written and is functioning satisfactory. It has become however a rather complicated piece of programming and I know that if I don’t document it now immediately, I will have the greatest difficulty “re-inventing” it later on. So therefore, mostly for my own documentation, a description of the working of the routine and the variables that interface with it.
Figure 11.1 Mapping of the boost converters on the I/Os of the micro-controller.
Since the writing of “Part I” things have changed in the sense that we have one negative power supply less to deal with, although that not really makes a difference since the “boost converter interrupt routine” can deal with up to eight converters simultaneously. From the point of view of the software, a boost converter is nothing more than a black-box
with a digital pulse input and an analog output voltage. When the analog output voltage is below a certain set-point, the pulse input needs to pulsed until the output voltage is above the set point. The pulse width I use here is 20 us (although I might change it to 30 us in a later stage) and the repetition frequency of the pulses is 10 kHz. The analog voltages are measured by the AD converter on the microcontroller. Each boost converter thus requires a separate analog input. The output pulses are
available on one of the I/O ports of the PIC controller. As a result of how the software is organized these pulse outputs have to be located on the same output port. For the uTracer 3 I have chosen to use the lowest 3 bits of PORTB, since most of the higher bits of this port are already in use for the in-circuit programming interface. Fig. 11.1 summarizes the connections to the PIC for the three boost converters.
As mentioned before control of the boost converter is performed by an interrupt service routine which is called on a timer 0 overflow every 100 us (the 10 kHz repetition rate). It will be recalled that also in the version 2 uTracer the boost converters were controlled by an interrupt routine, however, in that case the interrupt routine only generated the pulses; the decision whether or not pulses need to be generated (so the AD conversions and the comparison of the AD results with the set-points) was done by the main program since at that time I thought it would be impossible to also do that in the interrupt routine. This caused a lot of problems. In the “Part I” section on this topic, I explained how the AD acquisition can be inter-weaved with the pulse generation. What it boils down to is that the pulse time (20 us), which is time actually consumed by the interrupt service routine and which in the version 2 software was “burnt” in a delay loop, is now used to let the AD converter settle to a new input selection and to do the comparison of a previous AD conversion to the set-point value. Next to this the time in between the pulses, which is time used by the main program, is used to do the AD conversion for the next boost converter. The interweaving of the pulse generation and the processing of the AD results requires that the routine is optimized for speed. This means that several tricks have been used e.g. to eliminate unnecessary branching. Another difference with the version 2 software is that the routine which discharges the boost converter capacitors has been disentangled from the boost converter routine. In the end that made more sense, is more transparent and requires less overhead.
Figure 11.2 High level overview of the interrupt based boost converter service routine.
Figure 11.2 gives a high level overview of the boost converter interrupt routine. As mentioned it is called very 100 us. The first thing which is done is that the W and STATUS registers are saved. Next one of three pieces of code (a cycle) is executed. In this case there are three cycles since there are three boost converters to service. A counter ensures that upon every call to the interrupt routine a new cycle is executed. For this counter I used a rather out-of-the-way construction. Instead of incrementing an integer and performing a comparison of two numbers at the beginning of every cycle I used a shift register construction. The shift register I_ROTATE is loaded with 00000001 at initialization and the 1 is shifted one position to the left after every cycle. In this way only a simple “btfss” instruction is required to check if a cycle has to be executed or not. In the end it turned out to be a bit more complicated since we have to make sure that the carry bit is cleared before every shift operation. Perhaps if I had to rewrite the routine I would use a normal counter, but anyway it is functioning very satisfactory this way.
The different cycles resemble each other in the sense that in each cycle the outputs are pulsed if needed. However, in every cycle a different AD conversion is started while also in each cycle the data for a different boost converter is processed. At the start of cycle 1 e.g. the AD conversion result for the negative power supply is available (the AD conversion was started the previous cycle) so that the result can be compared to the set-point. In parallel to this the AD converter is already prepared to sample the anode supply.
The boost converter interrupt routine communicates with the main program via a number of variables. In the first place the main program has to store the 10-bit set points for the negative power supply, the anode supply and the screen supply in variables (NP_SET_H:NP_SET_L), (A_SET_H:A_SET_L), and (S_SET_H:S_SET_L) respectively. Next the boost converter is controlled via four control bytes:
The correct procedure for setting the anode- or screen boost converters to a new set-point should comprise the following steps: first make sure the boost converter is disabled by resetting the corresponding bit in BST_ENBL. Next modify the set-point value. Since the buffer capacitor can have been charged to a value higher than the set-point during a previous measurement, we now first have to discharge it until we are sure the buffer capacitor voltage is lower than the set point (click for more info). This has to be done by the main program, but it can use the information in BST_MSK to see if the voltage is higher of lower than the set-point. There is a snag here: as mentioned it takes at least three cycles to make sure BST_MSK is properly updated. The optimal procedure is that the main program issues a 1 ms discharge pulse regardless of the status of BST_MSK. The discharge pulse is used to charge the pulse capacitor but also serves as the delay to ensure BST_MSK is updated. After the 1 ms discharge pulse, the main program should continue discharging the buffer capacitor until the proper bit in BST_MSK becomes reset. Next the BST_OK bit is cleared and the converter is enabled by setting the bit in BST_ENBL. When all BST_OK bits become set again, all boost converters have reached their set-point and a measurement pulse can be issued.
Figure 11.3 Cycle 1 code example.
Finally, for the purpose of documentation let’s analyze the code of one of the “cycles.” Figure 11.3 gives the assembler code for the #1 cycle which controls the negative power supply.
| to top of page | back to homepage | to part I |
Finally I have arrived at the stage where the whole thing can be assembled and tested. It has been a busy year, and the Christmas holiday (2011) was the perfect moment to unwind myself a bit by filling a perfboard with good-old through-the-board components. Personally I think that SMD components are just horrible. They make experimenting extremely
difficult and take all the fun out of the hobby. Fortunately I have spent the last 20 years building up a stock of “normal” components that will hopefully last until my hands will shake so much that only thing left will be reading these pages. I have already argued that with a rather big project like this, it is better to build and test the circuit in parts. Especially the interplay between hardware, firmware and user interface makes the chances for a huge disappointment when the whole project is tested at once almost 100%. The first parts that were built were the processor with ICP and RS232 interfaces and the filament driver. The filament driver was tested using a separate pulse generator as input. It functioned perfectly as before, and had no problem at all in regulating a 6.3 V, 1.5 A filament, corresponding to an EL34. Also the negative power supply was tested using an external pulse generator. As expected it presented no problems.
The next circuits to be assembled were the high voltage boost converters and the high voltage switches. Before they were tested, first the new interrupt service routine which controls the boost converters was written (see previous section). This was a tricky bit of programming and took a few days, but without too much problems worked very satisfactory.
The discharge circuit
The next part to be tested was the discharge circuit. It will be recalled that whith respect to the V2 uTracer, the firmware which controls the discharging of the buffer capacitors was removed from the interrupt routine and included in the main program. A charge cycle now contains the following steps:
Figure 12.1 Voltage drop over the current sense resistor as a result of the discharging of the buffer capacitor.
During the testing of this sequence a rather curious problem was encountered. When a sequence of voltages was programmed e.g: 50, 100, 150, 50, 100, 150, it appeared from the values returned by the uTracer that during the second series the first voltage was a bit higher than the set-point, e.g.: 58 V instead of 50 V. It was always the second and subsequent series which returned a too high value. A few hours were spend searching for the cause of this strange problem. Obviously at first the software was suspected. Checking the firmware line-by-line and adding numerous breakpoints eventually revealed that when the buffer capacitor voltage was measured during discharging, the discharging was stopped at a too high voltage. I was so convinced that this was a software problem that I didn’t even consider the possibility that the cause could also have been located in the hardware. And that in the end turned out to be the case! When the discharge transistor T2 (Fig. 12.1) is switched on, the discharge current will obviously flow through the current sense resistor R4. This will cause a voltage drop over R4 with a polarity as indicated. The voltage drop will lower the voltage measured by the high voltage divider circuit (R2 and R3). The buffer capacitor voltage will therefore appear to be lower than it really is.
This was something I had absolutely overseen. Fortunately the problem could be solved completely in software. The solution is simple: switch off the discharging on the exact moment the voltage is measured. It was simply implemented by inserting an instruction in between lines 01 and 02 in the code listed in Fig. 11.3 which switches of the discharging. To continue the discharging after execution of the interrupt routine, the discharging is continuously restarted in the loop in the main program which coordinates the discharging process.
Figure 12.2 Boost converters “under-test.”
Testing the over-current switch-off circuit.
In sections 5 and 6 it was explained that “the short circuit protection,” or more in general “the over-current protection,” consists of two components. In the first place a simple hardware circuit which limits the current to approximately 250 mA. But even when the current is limited and the measurement pulse is only 1 ms, this still results in a destructive dissipation in the high voltage transistor. A second protection mechanism therefore switches off the high voltage the moment an over-current condition is sensed. The mechanism consists of a comparator on board of the micro-controller which compares the voltage drop over the current sense resistor with a programmable voltage reference which is generated on-chip (Fig. 5.3).
Figure 12.3 Manipulation of interrupts around the measurement pulse generation part.
As soon as the comparator detects an over-current condition, an interrupt is generated which switches off the high-voltage. Normally timer0 generates an interrupt every 100 us so that boost converters can be serviced. As it happens, the boost converters are shut-down during the actual measurement pulse to minimize the noise in the system. During the time the boost converters are off, the interrupt is redirected so that the high voltage switches are switched off. This requires some fiddling with interrupts which is illustrated by the code example in Fig. 12.3. The code is pretty straightforward. A change of the output of one of the comparators causes an interrupt. To reset the interrupt generating condition a dummy read to CMCON is needed. Flag INTSEL is set to communicate to the interrupt service routine that the interrupt was caused by a change of output of one of the comparators.
Figure 12.4 Spikes on the measurement signal as a result on ADC MUX switching (left), current protection circuit in action (right). See also text below.
During testing of the circuit a rather unexpected phenomenon was encountered. During the first test the anode current was measured halfway during the 1 ms measurement pulse. Referring to the code example of Fig. 12.3, the difference was that the call to AD_AC, which samples the anode current, was performed in between two 0.5 ms delay loops. For currents well below the set compliance current everything worked as expected. However, as the measured current approached the current limit, the measurement pulse was sometimes halved! This obviously had something to do with the analog sampling of the anode current. What happened was when the analog input MUX was directed to the anode current input, this induced a spike on the input voltage, due to the charging of the sample-and-hold capacitor. The effect was rather pronounced as a result of the relative high impedance of the external circuit due to R4 (Fig. 5.3). Figure 12.4 (left) shows how the spike was captured on the memory-scope. It also appears in the movie below at 3’4”. To solve the problem the current measurement was moved to the end of the pulse which was reduced in length to 0.5 ms (Fig. 12.3). This also reduced the discharging of the buffer capacitor for high currents. Additionally the current protection was switched off during the actual current measurement by disabling interrupts (line 16). So during the last 20 us of the total measurement pulse, the over current protection is off; since this is very short it should not pose a problem.
Figure 12.4 (right) shows the current protection circuit in action. The upper trace shows the signal used to drive the LED in the opto-coupler of the high-voltage switch, while the bottom trace is the input voltage to the current protection OpAmp on-board of the micro-controller. At point (a)the microcontroller switches on the high-voltage switch on. About 4 us later the high voltage switch responds, and a current starts to flow (b). Immediately an over-current condiction is detected and within 2 us the controller switches of the high voltage switch (c). It then takes ca. 15 us for the high voltage switch to respond and the current is interrupted (d). These results are in perfect agreement with the results obtained with the breadboard circuit.
The circuit so far worked so beautiful that I could not resist posting a short movie showing the testing of the over current protection.
Testing the Programmable Gain Amplifier.
Working with the version 2 uTracer, I quickly experienced that one of its most irritating limitations was the lack of a comfortable measurement range selection. We are all spoiled by working with oscilloscopes where our wise forefathers have found it convenient to scale measurement ranges as: 1-2-5-10–20–50–100-… In section 5 the PGA113 “programmable amplifier” from TI was introduced. Normally I prefer to design my circuits using “easy” components which I can just pull from my rather extensive stock of components. However, in this case it would have been foolish not to make an exception. The PGA113 is exactly the perfect component to realize “oscilloscope type” ranging for the uTracer, and on top of that it only costs a few euro. Its only drawback is that it only comes in an impossible small package!
Figure 12.5 Functional diagram of the PGA113 and SPI protocol.
Figure 12.5 shows the block diagram of the PGA113. The circuit has rail-to-rail inputs and outputs (well almost). When Vref is tied to ground, the circuit basically behaves as a non-inverting amplifier with a transfer function given by Vout = G*Vin, with Vout and Vin measured with respect to ground. The gain can be set to 1,2,5,10,20,50,100 and 200. Programming of the gain is done with a SPI (Serial Peripheral Interface). The protocol is very simple, first the chip select (CS) line is made low to select the PGA113. Next 16 bits are clocked into the PGA113 on every rising edge of the clock input, the most significant bit first (Fig. 12.5). When the first byte is 2A Hex, this signals the PGA113 that the next byte will set the gain and the selected input channel. Figure 12.5 summarizes how a gain can be selected. The PGA113 has two input channels. Normally channel 1 is used. Channel 0 can be used as an additional input channel, or is can be used in an on-chip offset calibration procedure. I do not use the offset procedure, but have reserved input channel 0 for the dynamic transconductance measurement option. The microcontroller has an on-board SPI interface, but I preferred to write a small routine which “bit-bangs” the SPI bits to an output. Routine “spi_anode” writes “2A + SPI_ANODE” to the anode PGA113, while “spi_screen” writes “2A + SPI_SCREEN” to the screen PGA113.
Figure 12.6 An adaptor PCB connects the SMD world to the more standard “DIL dimension” world. Two 100 nF SMD capacitors are used to decouple the both the analog and the digital supplies of the PGA113 as close as possible to the actual device.
Fortunately there are adaptor PCBs so that it is still possible to use these tiny components on a normal perfboard. I have worked with SMDs before, but this was really the first time that I had to use a microscope! Nevertheless, the whole circuit worked like a dream. In the initial tests, a 27 ohm current sense resistor was used. This implies that at a gain of 200, 5 V full scale input to the AD converter corresponds to 5 / 200 = 25 mV voltage drop over the current sense resistor corresponding to 0.025 / 27 = 926 uA! For this range the signal appeared to be a bit noisy (Fig. 12.7 left). In retrospect this is not surprising. Even my very nice PM2534 Fluke multi-meter is “noisy” in this measurement range when no averaging is used.
Figure 12.7 First measurements using the PGA113 set to a gain of 200X. The load was a 800k resistor to that the current at 200 V amounted to 250 uA (values on the y-axis have no meaning). I the left figure no averaging was used, in the center figure the measurement was averaged 8X in the right figure 16X.
Basically there are (at least) two ways to tackle the noise problem: averaging and bandwidth reduction. The simplest method is averaging which can be completely implemented in software. As it turned out it was even very simple to implement it. The measurement routine which normally writes the (10 bit) current measurement to two (high/low) output bytes was modified so that it added the measurement to the output bytes rather than just copying it to it. So by calling the measurement routine e.g. 8 times, the output bytes contain the sum of the eight measurements. Figure 12.7 shows three exactly the same measurements in which: no averaging was used (left), or the measurement was averaged 8x (middle) or 16x (right). The current values along the y-axis are arbitrary because the GUI was not modified yet for the new hard- and firmware. However, since a 800k resistor was measured, full scale corresponds to 200 / 800.000 = 250 uA.
Figure 12.8 The addition of a small 2n2 capacitor across the feedback resistor over the OpAmp greatly reduces the measurement noise.
The other method to reduce noise is to limit the bandwidth of the measurement system. In first instance no bandwidth limiting measures were taken so that the overall bandwidth must have been quite large (I don’t know exactly how large). All the noise over this band contributed to the observed the current fluctuations which were observed. However, there is no need at all for such a large bandwidth. The only requirement is that the current reaches its steady state value well within a millisecond. The simplest way to reduce the bandwidth is to shunt the resistor in the return path of the inverting OpAmp with a capacitor to give it a low pass characteristic. With my simple MicroCap circuit simulator I verified that with 2.2 nF the rise time of the current is such that it settles within 0.3 ms.
Figure 12.9 Measurements using the PGA113 set to a gain of 200X. The load was a 800k resistor to that the current at 200 V amounted to 250 uA (values on the y-axis have no meaning). I the left figure no averaging or bandwidth reduction was used, in the center figure the bandwidth was reduced by adding a 2n2 capacitor over the feedback resistor of the OpAmp, in the right figure next to the bandwidth reduction also the measurement was averaged 8 X.
The addition of the small capacitor resulted in a very significant improvement of the noise behavior of the circuit. The left graph in Fig. 12.9 shows 7 consecutive I-V measurements of a 800k resistor without the 2.2 nF capacitor. In the center graph of Fig. 12.9 the capacitor was added. Finally, in the right graph of Fig. 12.9 the same measurement was repeated but now the measurement was 8 times averaged. The curves are so identical that the light color of the last one nearly obscures the first 6 measurements. All in all not a bad performance for such a simple circuit!
Bits and Pieces
The last parts to be tested were the filament supply, the grid bias circuit and the “cathode” circuit. The cathode circuit is the new construction which allows measurements down to zero volt anode and screen bias. Several safety features were included into the circuit to protect the uTracer against short-circuits and flash-overs.
Figure 12.9 The modified cathode circuit and a measurement of the cathode potential rise as a result of a 100 mA current measurement.
In the original circuit depicted in Fig. 8.1 transistor T6 was used to discharge buffer capacitor C4 which stores the charge released during a measurement pulse or a flash-over. In the final circuit shown in Fig. 12.9 (left) the transistor was replaced by a fixed 1 k resistor (R6, Fig. 12.9). The resistor draws a constant current of at least 20 mA. This current discharges C4 at a rate of 20 V/s (20 mV/ms). Additionally, the constant current ensures a minimal voltage drop over isolation diode D3 for low cathode currents. The upper trace in the oscilloscope image depicted in Fig. 12.9 shows the measurement pulse signal generated by the micro-controller. The falling edge of this pulse was used to trigger the memory-scope. The lower trace shows the cathode potential with repect to ground. In this measurement the anode current was 100 mA. The expected voltage increase is: V = (I*t)/C = (0.1*0.001)/0.0001=0.1 V, exactly what is measured. Observe that also the discharging of C4 very nicely corresponds with what we expect (20 mV/ms).
Figure 12.10 (left) shows a voltage-current measurement using a 2k resistor as load. The voltage was swept in this case between 2 and 200 V. There is a very practical reason that the lower limit for the anode voltage was set to 2 V instead of 0 V: when for a new voltage sweep the buffer capacitor is discharged, the voltage measured by the controller is subjected to an inaccuracy caused by tolerances in the resistive voltage divider and the 5 V power supply which is the reference for the AD converter. It is therefore not unthinkable that the controller measures a voltage which a fraction too high. For voltages well above the power supply this is not a problem, it just causes a small offset. However, for voltages very close to the power supply it can happen that the controller wants to continue to discharge the capacitor (because it measures a slightly too high voltage) while this is not possible because the buffer capacitor voltage cannot decrease to a value below the supply voltage. It appears that a margin of 2 V is enough to solve the problem. Despite the fact that there is a small problem for voltages lower than 2 V, it is quite straightforward to discharge the capacitor to the point that it is clamped to the supply voltage. This can be done by simple adding a second or so to the discharge cycle. What I think I will do in software is simply map all voltages between 1 and 2 V to 2 V, and all voltages between 0 and 1 V to 0 V.
Figure 12.10 (left) I-V curve 2 – 200 V of a 2k resistor, (right) the PWM signal which drives the filament circuit is disabled during the measurement pulse.
There is little to say about the grid-bias and filament driver circuits except that they functioned as expected. Figure 12.10 (right) shows on the upper trace the measurement pulse and on the lower trace the PWM signal which drives the filament supply. The PWM pulses are quite small (11%) since in this case the filament voltage was 6.3 V. To minimize the noise during the measurement pulse, the filament driver is shut down for the duration of the measurement pulse. This is simply done by making the PWM output temporarily an input.
| to top of page | back to homepage | to part I |
After all this planning and testing the final circuit diagram is slowly getting its final shape. Figure 13.1 shows the most recent version, and even in this version some things, such as the connections of the various parts to the IO ports of the micro-controller have not fully crystallized yet. When there is a new version of the circuit diagram I will update the circuit diagram with the date on the circuit diagram serving as a version number.
Figure 13.1 Most current version of the circuit diagram of the analog part of the uTracer version 3.
At first sight the complete circuit might look a bit intimidating. However, in reality it is not more than a hand full of discrete components and a few ICs. Most components have been selected for low-cost and availability (from Farnell). Despite the fact that the circuit occupies significantly less (perf-board) real estate compared to the version 2 uTracer, it offers a significantly better performance and has many added features, such as programmable sensitivity and programmable over current protection.
Figure 13.2 (right) The very first measurement of a tube (EL84) with the uTracer version 3 (Friday 27th Januari 2012). In the test setup (left) grid and anode voltages are monitored.
After testing of the grid-bias circuit, the unavoidable moment arrived when a real tube could be connected to the V3. Figure 13.2 shows the measurements setup during that memorable moment and a screen-shot of literally the first measurement, an Ia(Va) measurement of an EL84 for different grid-biases. Compared to the V2 uTracer the measurement is drift and offset free and starts from 0 V. Although every part of the circuit was carefully tested individually, such a first complete test is always an exciting moment and indeed a very rewarding one when after months of preparation all the pieces fit together perfectly.
Figure 13.3 Ia(Vg) set of curves for an EL84 (left) the same measurement overlaid with a new measurement (right) showing the excellent reproducibility and absence of drift and offset (as compared to the version 2 uTracer).
Compared to the version 2 uTracer, the reproducibility of the measurements with the version 3 is excellent. Figure 13.3 (left) shows an Ia(Vg) set of curves for different anode voltages of an EL84. In the right graph in Fig. 13.3 this measurement was overlaid with a new measurement using the store and retrieve option of the GUI. As can be seen the two measurements overlay perfectly! Since the version 3 does not require stabilization cycles as in the version 2 the measurements are also much faster.
A typical measurement as shown in Fig. 13.3 takes about 25 seconds. About half of this time is spend on charging the buffer capacitor of the boost converter, giving the constraints of the design this is unfortunately unavoidable. The other half of this time is spend on discharging the buffer capacitor for the measurement of a new sweep. In retrospect the choice for a discharge resistor is not so clever. The lower the voltage, the more time it takes to discharge the capacitor. A current source would have been a much better idea. I will first finish the circuit as is, and I think I will then replace the resistive discharging for a current source discharge circuit. Anyway, 25 seconds may seem long, especially compared to some of the other tube curve-tracer designs which have been proposed, but it is the price for its simplicity and by the way, the waiting for the filament to reach its operating temperature also takes about 30-60 seconds!
Figure 13.3 (left) variation between two EL84 which both would qualify as good, (right) an EL84 with an emission problem.
The first experience with the version 3 is that it is a pleasant instrument to work with. The measurement could have been somewhat faster, but it is not at all irritating. The store and retrieve option is especially useful in comparing tubes. Figure 13.3 shows the tube-to-tube variation between two EL84 tubes, both from Philips. I spend 15 minutes in sorting out my EL84 stock and found several bad ones which showed an emission problem especially at higher current levels (Fig. 13.3 right).
Testing Magic Eyes (for free)
Like so many other admirers of vacuum tube technology, I have “a weak spot” for Magic Eyes. I find them fascinating tubes, but then again I have a passion for every tube which in one way or the other emit light. Testing of a magic eye in the sense of taking its I-V curves usually doesn’t make much sense. The big question usually is: are the phosphors and the emission of the cathode still sufficient to produce a nice image?
To produce the green patterns displayed by a magic eye basically a high voltage power supply, a negative grid bias supply and a filament supply are needed. We have all of those in the uTracer, but unfortunately the anode supply is pulsed so that the image will be (I guess) invisible.
Testing the boost converters it occurred to me that the boost converters obviously also can generate a useful continuous current. To get an idea of how much current the boost converters can generate a 100 k resistor was connected directly across the buffer capacitor of the boost converter. It appeared that the converter could easily generate 300 V in continuous mode which corresponds to 3 mA. With a 50 k resistor the maximum voltage reached was 250 V, corresponding to 5 mA. More than enough to drive all the magic eye tubes I know. Beautiful and so simple! We only need an additional connection to the positive terminal of the buffer capacitor and a modification of the firmware and the GUI and the uTracer can also be used “to play with” magic eye tubes. It is also possible to connect the “triode” section of the magic eye to the anode terminal and the “CRT” section to the screen terminal of the uTracer. In that way both voltages can be set independently while additionally the current can be measured. Although I do not directly see what the advantage could be, of course also “low current” normal tubes can be measured in this continuous mode.
What’s up next
Fortunately there is still enough work to be done on this project. At the moment the temporary wiring between the micro-controller and the analog electronics on the backside of the PCB is a mess that needs re-wiring in its final layout. Other changes are: reducing the value of the current sense resistors to 18 ohm, implementing the HV-on indicator and emergency stop button, adding the bandwidth reduction capacitors and replacing the discharge resistors with a current source. Also the screen supply has not been tested yet. After this the hardware will be basically ready so that I can devote my attention to upgrading the firmware and the GUI to implement: (auto) ranging, (auto) ranging, averaging, current compliance setting and measurement of the transconductance and output resistance.
| to top of page | back to homepage | to part I |
Figure 13.7
Direct measurement of the Transconductance ??
A lot of people are of the opinion that a direct measurement of the transconductance using an AC test is preferred over deriving the transconductance from a DC Ia-Vgk measurement. Personally I think that as long as inter-grid capacitance effects and electron travel delays can be neglected, both should yield the same result! However, I think that with a bit of effort, a direct (AC) measurement of the transconductance can be squeezed into the uTracer V3. Does that make sense? What do you think?
Let me know by mailing me at:
This section is merely here to remind myself of the modifications and new features I want to implement in the version 3 uTracer. It has become quite a long list. I have indicated if the item is related to “Hardware,” “Software” (the GUI on the PC), or “Firmware” (microcontroller code). The items are in random order.
| to top of page | back to homepage | to part I |
Yours truly in front of the PASCAL, one of the first computers made by Philips Research in 1960. It was used at Philips Research for calculations on hot air engines, television and semiconductors and was in use until 1972. It consisted of 1200 vacuum tubes, 10000 transistors and 15000 diodes and dissipated 10 kW. PASCAL stands for “Philips Akelig Snelle CALculator” (Philips awfully fast calculator). It is now in the faculty museum of the faculty of “Electrical enigeering, Mathematics and Informatics” of the Technical University in Delft. (Photo: Adnan Noor)
